Sitec currently have an opportunity for an FPGA Engineer to join our client based in Newport, South Wales. This is a contract role for an initial 6 months with extension likely. The pay rate for this role is £400p/day Ltd.
Senior FPGA Engineer, Newport
The Senior FPGA Engineer is responsible to the Head of Hardware Engineering for executing allocated FPGA Work Packages within agreed cost, time and quality constraints.
- All FPGAs are designed, developed, integrated and tested in accordance with Clients Defence and Space standards; all supporting documents are produced in accordance with Clients Defence and Space standards.
- Appropriate processes and methodologies are used to design and deliver allocated FPGA development work packages meeting cost, time and quality targets, agreed with their development team leader.
- Technical design decisions are made within the context of known practices, established precedents and acquired technical expertise. The cost/benefits of design possibilities are understood, and that judgement calls can be made based on them
- The provision of technical guidance to fellow team members in at least one major tool or technique used by Client
- Success of both internal and external design reviews and project reviews throughout the development life cycle.
- The support of the design and development of critical components where decisions may have a significant impact on project timescales.
- Customer liaison, by representing Clients Defence and Space on project related technical matters at Stakeholder meetings.
- Design and Development by taking a technical role as a Prime on a critical component where necessary.
- Report to Team Leader or Prime as appropriate
- Technical interface to Customers
- Effective collaboration with other engineering disciplines to agree specifications and to carry out integration and test
- Co-ordinate own time management with regard to project task milestones
- The focus of the job is Operational - delivery of project funded Work Packages.
- Analytical - To identify and isolate errors in the FPGA or integrated target platform, their likely causes and solutions.
- Ingenuity - To work on his/her own on a complete FPGA design from concept to delivery.
- Must have experience of FPGA design & implementation for communications equipment or equivalent
- Must have excellent FPGA development process knowledge
- Must be an experienced engineer, fully versed in design methodologies for their field able to work on their own, but providing regular reporting
- Must have recent design experience of devices from the following suppliers:
- Desirable to have recent experience of using several of the following tools/development environments:
- Altera Quartus II
- Mentor ModelSim
- MicroSemi Libero IDE
- Microsemi Libero SoC
- Xilinx Vivado
This vacancy is being advertised by Sitec.